
Next Meeting:
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Date: 13 May 2010 |
Meal Sponsor:
Mr. Mike Kirk, Agilent Technologies
Presentation Topics:
"Use Of Buried Capacitance Layers In Printed Circuit Boards:
Performance And Lessons From A Real World Example"
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Embedded capacitor technology has been driven by the need to save board area and/or reduce board size, increase functionality, lower costs and improve electrical performance. This technology has been utilized to enhance signal integrity, reduce impedance at high frequency and dampen noise, and not necessarily just to remove discrete capacitors.
We will show that by using thin core planes and simulation tools one can reduce the number of discrete capacitors and get better electrical performance. The actual number and type (size) of capacitors removed will be presented. In addition to discrete capacitor reduction, the amount of electro-magnetic radiation from the board (which can cause EMI issues) will be shown to be reduced by utilizing the embedded capacitor planes. This is attributed to the reduction in power/ground plane resonance. With a good predictive model, the decision to utilize embedded capacitors is simplified.
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Speaker:
Mr. John Andresakis, Oak-Mitsui Technologies
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